The present invention relates to the field of electro-optic displays. More specifically, the present invention relates to addressing liquid crystal displays (LCD) using a multi-row addressing scheme.
In conventional LCD devices, a matrix of display elements (pixels) may be arranged in a row by column array. To display visual images on the LCD display, a row driver can be used to switch on each element in a particular row. The switched on elements in that row can then receive unique signals from a plurality of column drivers. Each row of the array is switched on or xe2x80x9cenabledxe2x80x9d sequentially in a row-by-row addressing scheme until all rows have been addressed and the visual image for one frame is displayed.
This conventional system for driving the LCD pixels using a row-by-row addressing scheme has drawbacks in modern uses of LCD devices which demand higher definition. Higher definition can be achieved by increasing the number of pixels within a constant display area. However, simply increasing the number of pixels in a conventional device may degrade the performance of the display.
One reason is that adding pixel elements increases the total capacitive load seen by a column driver. In a conventional LCD matrix array which uses transistors switches, a column driver not only sees the storage capacitor Cs of a target pixel, Cpix, but also sees the combination of all the Cs within a single column of the array, as well as parasitic capacitances associated with neighboring columns. Switching voltages across such a capacitive load requires that the column drivers have robust current carrying capability. Since the area of a driver device is directly proportional to that current, the conventional row-by-row driving scheme is generally limited to medium resolution displays having a color depth of 24 bits per pixel at a 120 Hz frame rate.
A related reason is that, in a row-by-row scanning sequence, adding pixels decreases the available scanning transfer time, Ta, for a row of elements relative to the time needed to scan the entire matrix. Adequate scanning time is needed because the LCD pixels are connected to storage capacitors that require some minimum time to fully charge. As more rows of elements are added, the scanning time may need to be reduced in order to cycle through all the rows in the array in a selected frame time. Adding pixels not only reduces the available scanning time, Ta, but compounds the problem by increasing the capacitive load seen by a column. Thus, conventional architecture using a row-by-row addressing scheme may be inadequate for higher performance displays.
In view of current applications requiring higher display definition and higher pixel count, it would be desirable to provide an improved addressing method that can counter-act the negative effects described above and improve display performance.
A scheme for addressing an M row by N column array of display elements uses xe2x80x9cpre-writingxe2x80x9d to reduce cross-talk artifact in multi-row addressing. The method may include: delivering a plurality of (Q+1) enabling switching signals to a plurality of (Q+1) rows of elements through electrical connections. Q is a whole number 2 or greater, and the (Q+1)th row is contiguous to the Qth row. The method may further include: delivering independent signals to each enabled element, except those elements in the (Q+1)th row, which row receives a xe2x80x9cpre-writexe2x80x9d signal, the signals modulating light in the enabled display elements. These above steps may be successively repeated until all rows of elements in the matrix not yet enabled have been addressed. Preferably, the pre-write signals in the (Q+1)th row is the same as the signals in the Qth row. The method can reduce the brightness artifacts in the Qth, 2*Qth, 3*Qth . . . rows. The delivery of signals to each enabled element may be accomplished by row drivers and the delivery of enabling switches may be accomplished by column drivers. The multi-row addressing method with pre-writing facilitates higher performance LCD displays.